Get early access to our alpha and be the first to know when we launch.
Rapidly iterate on silicon design with one click setup for CI/CD, with results you can share with your team instantly.
Debug your VCD Dumps with our web based oscilloscope.
Use Verilator, Cadence, and Synopsys tools to lint and test your designs at scale in the cloud, or on your own hardware.
Reserve, provision, schedule jobs and monitor the health of your hardware lab.
$ pip install primitive $ primitive config